URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [trunk/] [bench/] [verilog/] [pci_behaviorial_target.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5844d 05h	/pci/trunk/bench/verilog/pci_behaviorial_target.v
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7889d 19h	/pci/trunk/bench/verilog/pci_behaviorial_target.v
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	8245d 02h	/pci/trunk/bench/verilog/pci_behaviorial_target.v
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8390d 06h	/pci/trunk/bench/verilog/pci_behaviorial_target.v
26	Modified testbench and fixed some bugs	mihad	8419d 21h	/pci/trunk/bench/verilog/pci_behaviorial_target.v
19	* empty log message *	mihad	8437d 22h	/pci/trunk/bench/verilog/pci_behaviorial_target.v