URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [trunk/] [rtl/] [verilog/] [pci_wb_slave.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5844d 05h	/pci/trunk/rtl/verilog/pci_wb_slave.v
153	Write burst performance patch applied. Not tested. Everything should be backwards compatible, since functional code is ifdefed.	mihad	6824d 01h	/pci/trunk/rtl/verilog/pci_wb_slave.v
140	Update! SPOCI Implemented!	mihad	7716d 02h	/pci/trunk/rtl/verilog/pci_wb_slave.v
132	Compact PCI Hot Swap support added. New testcases added. Specification updated. Test application changed to support WB B3 cycles.	mihad	7752d 03h	/pci/trunk/rtl/verilog/pci_wb_slave.v
113	ifdefs moved to thier own lines, this confuses some of the tools.	simons	7878d 20h	/pci/trunk/rtl/verilog/pci_wb_slave.v
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7889d 20h	/pci/trunk/rtl/verilog/pci_wb_slave.v
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	8077d 21h	/pci/trunk/rtl/verilog/pci_wb_slave.v