URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [tags/] [V3_0/] [vhdl/] [ram.vhd] - Rev 402

Rev	Log message	Author	Age	Path
352		linus	5585d 11h	/plasma/tags/V3_0/vhdl/ram.vhd
350		root	5614d 06h	/plasma/tags/V3_0/vhdl/ram.vhd
140	This commit was manufactured by cvs2svn to create tag 'V3_0'.		6714d 19h	/plasma/tags/V3_0/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6714d 19h	/plasma/tags/V3_0/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7194d 17h	/plasma/tags/V3_0/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7332d 05h	/plasma/tags/V3_0/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	7956d 15h	/plasma/tags/V3_0/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8056d 16h	/plasma/tags/V3_0/vhdl/ram.vhd
55	Altera	rhoads	8072d 22h	/plasma/tags/V3_0/vhdl/ram.vhd
48	Altera	rhoads	8083d 18h	/plasma/tags/V3_0/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8170d 19h	/plasma/tags/V3_0/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8203d 00h	/plasma/tags/V3_0/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8233d 17h	/plasma/tags/V3_0/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8245d 01h	/plasma/tags/V3_0/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8467d 23h	/plasma/tags/V3_0/vhdl/ram.vhd