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[/] [plasma/] [trunk/] [vhdl/] [ram.vhd] - Rev 416

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Rev Log message Author Age Path
352 linus 5717d 04h /plasma/trunk/vhdl/ram.vhd
350 root 5746d 00h /plasma/trunk/vhdl/ram.vhd
344 Fixed compiler warning rhoads 5817d 16h /plasma/trunk/vhdl/ram.vhd
335 Use enable signal for byte_we rhoads 5864d 14h /plasma/trunk/vhdl/ram.vhd
260 Removed Xilinx use statements rhoads 6196d 22h /plasma/trunk/vhdl/ram.vhd
139 Major changes -- updated to Plasma Version 3 rhoads 6846d 12h /plasma/trunk/vhdl/ram.vhd
132 Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly. rhoads 7326d 11h /plasma/trunk/vhdl/ram.vhd
128 Reset all registers, constants now upper case. rhoads 7463d 22h /plasma/trunk/vhdl/ram.vhd
98 Fix size of GENERIC ram. rhoads 8088d 08h /plasma/trunk/vhdl/ram.vhd
85 Use ADDRESS_WIDTH when decoding mem_sel rhoads 8188d 09h /plasma/trunk/vhdl/ram.vhd
55 Altera rhoads 8204d 16h /plasma/trunk/vhdl/ram.vhd
48 Altera rhoads 8215d 11h /plasma/trunk/vhdl/ram.vhd
43 Renamed M-lite to Plasma rhoads 8302d 12h /plasma/trunk/vhdl/ram.vhd
39 Changed name to M-lite to avoid trademark issues. rhoads 8334d 17h /plasma/trunk/vhdl/ram.vhd
11 Added comment for DEBUG mode rhoads 8365d 11h /plasma/trunk/vhdl/ram.vhd
7 Made writes 4 cycles, improved mem_ctrl.vhd rhoads 8376d 18h /plasma/trunk/vhdl/ram.vhd
2 MIPS-lite CPU core rhoads 8599d 17h /plasma/trunk/vhdl/ram.vhd

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