URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] [ram.vhd] - Rev 418

Rev	Log message	Author	Age	Path
352		linus	5533d 04h	/plasma/trunk/vhdl/ram.vhd
350		root	5561d 23h	/plasma/trunk/vhdl/ram.vhd
344	Fixed compiler warning	rhoads	5633d 15h	/plasma/trunk/vhdl/ram.vhd
335	Use enable signal for byte_we	rhoads	5680d 14h	/plasma/trunk/vhdl/ram.vhd
260	Removed Xilinx use statements	rhoads	6012d 22h	/plasma/trunk/vhdl/ram.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6662d 12h	/plasma/trunk/vhdl/ram.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7142d 10h	/plasma/trunk/vhdl/ram.vhd
128	Reset all registers, constants now upper case.	rhoads	7279d 21h	/plasma/trunk/vhdl/ram.vhd
98	Fix size of GENERIC ram.	rhoads	7904d 08h	/plasma/trunk/vhdl/ram.vhd
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8004d 09h	/plasma/trunk/vhdl/ram.vhd
55	Altera	rhoads	8020d 15h	/plasma/trunk/vhdl/ram.vhd
48	Altera	rhoads	8031d 10h	/plasma/trunk/vhdl/ram.vhd
43	Renamed M-lite to Plasma	rhoads	8118d 11h	/plasma/trunk/vhdl/ram.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8150d 17h	/plasma/trunk/vhdl/ram.vhd
11	Added comment for DEBUG mode	rhoads	8181d 10h	/plasma/trunk/vhdl/ram.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8192d 18h	/plasma/trunk/vhdl/ram.vhd
2	MIPS-lite CPU core	rhoads	8415d 16h	/plasma/trunk/vhdl/ram.vhd