OpenCores
URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] [reg_bank.vhd] - Rev 426

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
397 Added RAM32X1D option rhoads 4883d 21h /plasma/trunk/vhdl/reg_bank.vhd
376 Add write_enable to sensitivity list for Altera rhoads 5189d 11h /plasma/trunk/vhdl/reg_bank.vhd
365 Added UNISIM comment rhoads 5448d 02h /plasma/trunk/vhdl/reg_bank.vhd
352 linus 5548d 18h /plasma/trunk/vhdl/reg_bank.vhd
350 root 5577d 13h /plasma/trunk/vhdl/reg_bank.vhd
344 Fixed compiler warning rhoads 5649d 05h /plasma/trunk/vhdl/reg_bank.vhd
333 Updated Altera lpm_ram_dp usage for Cyclone FPGAs rhoads 5706d 03h /plasma/trunk/vhdl/reg_bank.vhd
261 Removed commented out lines rhoads 6028d 11h /plasma/trunk/vhdl/reg_bank.vhd
139 Major changes -- updated to Plasma Version 3 rhoads 6678d 01h /plasma/trunk/vhdl/reg_bank.vhd
132 Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly. rhoads 7158d 00h /plasma/trunk/vhdl/reg_bank.vhd
128 Reset all registers, constants now upper case. rhoads 7295d 11h /plasma/trunk/vhdl/reg_bank.vhd
123 Uncomment out the Altera portion. Xilinx users may need to re-comment out this section. rhoads 7381d 01h /plasma/trunk/vhdl/reg_bank.vhd
115 Matthias Grunewald's changes for Xilinx FPGA dual-port RAM. rhoads 7495d 01h /plasma/trunk/vhdl/reg_bank.vhd
108 changed interrupt vector from 0x30 to 0x3c rhoads 7768d 22h /plasma/trunk/vhdl/reg_bank.vhd
88 Cleanup spaces rhoads 8019d 22h /plasma/trunk/vhdl/reg_bank.vhd
74 pause in rhoads 8028d 00h /plasma/trunk/vhdl/reg_bank.vhd
55 Altera rhoads 8036d 05h /plasma/trunk/vhdl/reg_bank.vhd
48 Altera rhoads 8047d 00h /plasma/trunk/vhdl/reg_bank.vhd
47 Altera rhoads 8054d 01h /plasma/trunk/vhdl/reg_bank.vhd
43 Renamed M-lite to Plasma rhoads 8134d 01h /plasma/trunk/vhdl/reg_bank.vhd

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.