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[/] [plasma/] [trunk/] [vhdl/] [tbench.vhd] - Rev 418

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Rev	Log message	Author	Age	Path
403	Disable Ethernet and cache when simulating.	rhoads	4819d 17h	/plasma/trunk/vhdl/tbench.vhd
352		linus	5618d 07h	/plasma/trunk/vhdl/tbench.vhd
350		root	5647d 02h	/plasma/trunk/vhdl/tbench.vhd
346	Support optional 4KB cache	rhoads	5714d 21h	/plasma/trunk/vhdl/tbench.vhd
265	Changed write_byte_enable to byte_we	rhoads	6098d 00h	/plasma/trunk/vhdl/tbench.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6747d 14h	/plasma/trunk/vhdl/tbench.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7227d 13h	/plasma/trunk/vhdl/tbench.vhd
128	Reset all registers, constants now upper case.	rhoads	7365d 00h	/plasma/trunk/vhdl/tbench.vhd
106	better test mem_pause	rhoads	7841d 13h	/plasma/trunk/vhdl/tbench.vhd
102	permit testing mem_pause	rhoads	7842d 12h	/plasma/trunk/vhdl/tbench.vhd
55	Altera	rhoads	8105d 18h	/plasma/trunk/vhdl/tbench.vhd
51	GENERIC	rhoads	8116d 13h	/plasma/trunk/vhdl/tbench.vhd
48	Altera	rhoads	8116d 13h	/plasma/trunk/vhdl/tbench.vhd
47	Altera	rhoads	8123d 14h	/plasma/trunk/vhdl/tbench.vhd
43	Renamed M-lite to Plasma	rhoads	8203d 14h	/plasma/trunk/vhdl/tbench.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8235d 19h	/plasma/trunk/vhdl/tbench.vhd
8	Preparing to use dual-port memory for registers.	rhoads	8272d 14h	/plasma/trunk/vhdl/tbench.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8277d 21h	/plasma/trunk/vhdl/tbench.vhd
6	JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts.	rhoads	8281d 19h	/plasma/trunk/vhdl/tbench.vhd
2	MIPS-lite CPU core	rhoads	8500d 19h	/plasma/trunk/vhdl/tbench.vhd

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[/] [plasma/] [trunk/] [vhdl/] [tbench.vhd] - Rev 418

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