OpenCores
URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp/] [memblock.vhd] - Rev 189

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
189 Limiting Block size on the operands register to a maximum of 256 jguarin2002 4557d 12h /raytrac/branches/fp/memblock.vhd
181 Version beta 0.2 previo a conexion con bus avalon en QSYS/SOPC jguarin2002 4559d 20h /raytrac/branches/fp/memblock.vhd
174 Comment tweaking... its the same RTL anyway jguarin2002 4596d 07h /raytrac/branches/fp/memblock.vhd
161 Changes for the sake of the firsts simulation tracking results jguarin2002 4602d 11h /raytrac/branches/fp/memblock.vhd
160 Corrections derived from simulation debugging jguarin2002 4607d 04h /raytrac/branches/fp/memblock.vhd
159 wrcycle\!\? No\! rwcycle.... jguarin2002 4608d 13h /raytrac/branches/fp/memblock.vhd
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4608d 18h /raytrac/branches/fp/memblock.vhd
157 For the first time the whole Raytrac RTL code compiled along with its testbench code in ModelSim jguarin2002 4609d 05h /raytrac/branches/fp/memblock.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4615d 10h /raytrac/branches/fp/memblock.vhd
152 Test bench oriented modifications jguarin2002 4619d 11h /raytrac/branches/fp/memblock.vhd
151 Previous Work to generate test benching jguarin2002 4678d 07h /raytrac/branches/fp/memblock.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4692d 04h /raytrac/branches/fp/memblock.vhd
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4694d 20h /raytrac/branches/fp/memblock.vhd
143 working on result queue sync decoding signals jguarin2002 4718d 23h /raytrac/branches/fp/memblock.vhd
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4790d 23h /raytrac/branches/fp/memblock.vhd
140 Syncing: its awful work..... jguarin2002 4791d 05h /raytrac/branches/fp/memblock.vhd
139 Sync jguarin2002 4802d 19h /raytrac/branches/fp/memblock.vhd
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4807d 10h /raytrac/branches/fp/memblock.vhd
136 gogogo jguarin2002 4815d 22h /raytrac/branches/fp/memblock.vhd
133 Added the instructions queue jguarin2002 4823d 10h /raytrac/branches/fp/memblock.vhd

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.