URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp/] [sqrt32.vhd] - Rev 188

Rev	Log message	Author	Age	Path
158	Changing std_logic_vector types to my custom far more convinients xfloat32\!	jguarin2002	4605d 03h	/raytrac/branches/fp/sqrt32.vhd
153	last modifications for tb_compiler.py compliance	jguarin2002	4611d 19h	/raytrac/branches/fp/sqrt32.vhd
152	Test bench oriented modifications	jguarin2002	4615d 20h	/raytrac/branches/fp/sqrt32.vhd
151	Previous Work to generate test benching	jguarin2002	4674d 16h	/raytrac/branches/fp/fsqrt32.vhd
150	First Beta of RayTrac for a total size of 3874 lcells. Great Result\!	jguarin2002	4688d 13h	/raytrac/branches/fp/fsqrt32.vhd
139	Sync	jguarin2002	4799d 04h	/raytrac/branches/fp/fsqrt32.vhd
137	Syncing with enables and eleminated all the register outputs since none block should carry on a register output	jguarin2002	4809d 20h	/raytrac/branches/fp/fsqrt32.vhd
121	taking out std_logic_arith from sight.... no conversions allowed	jguarin2002	4855d 08h	/raytrac/branches/fp/fsqrt32.vhd
118	fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32	jguarin2002	4861d 19h	/raytrac/branches/fp/fsqrt32.vhd
104	Square Root and inversion support	jguarin2002	4892d 16h	/fsqrt32.vhd
103	Square Root Ok	jguarin2002	4892d 23h	/fsqrt32.vhd
99	Square Root... comin sun....	jguarin2002	4894d 14h	/fsqrt32.vhd