OpenCores
URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp_sgdma/] [arith/] [single/] [arithblock.vhd] - Rev 244

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
238 wide multiplicator added to avoid optimization jguarin2002 4473d 06h /raytrac/branches/fp_sgdma/arith/single/arithblock.vhd
230 RC 1.0 Previous rev(228), is functional and even more than this one, but is bigger and is for debugging jguarin2002 4479d 14h /arithblock.vhd
229 Total RtEngine Hardware, BUT, problems with interconnection... perhaps theres a problem with long path on ssumando5 jguarin2002 4480d 14h /arithblock.vhd
228 Fixed a BUG where big differences betweeen exponents difference suffered from miss-signedness because of the width of the result was 1 bit narrower, and still its highest significant bit was taken as the sign, in result big differences in where taken as negative results... leading to situations like A+0=0 cause the exponent chosen as the big one was the zero's (-127) leading to an unexpected 0 in the result. The bug was fixed by correcting the signedness of the operation and making the result less narrower in one bit. jguarin2002 4482d 07h /arithblock.vhd
219 RayTrac: Non tested and witouh TSE jguarin2002 4492d 00h /arithblock.vhd
206 Working towards a DMA oriented RayTRac jguarin2002 4504d 08h /arithblock.vhd
196 raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues jguarin2002 4534d 03h /arithblock.vhd
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4609d 11h /arithblock.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4616d 03h /arithblock.vhd
152 Test bench oriented modifications jguarin2002 4620d 04h /arithblock.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4692d 21h /arithblock.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.