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[/] [raytrac/] [branches/] [fp_sgdma/] [arith/] [single/] [sqrt32.vhd] - Rev 241

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238 wide multiplicator added to avoid optimization jguarin2002 4469d 06h /raytrac/branches/fp_sgdma/arith/single/sqrt32.vhd
221 The change in sqrt and inv is about the path of the files with the data memory. dpc has been changed by ap_n_dpc and there was an error on RayTrac related to the load sync chain: the loading of Dot product Operation was being carried out as if it was an unary operation rather than a two operands operation jguarin2002 4487d 21h /sqrt32.vhd
209 Working towards a DMA oriented RayTRac jguarin2002 4500d 08h /sqrt32.vhd
158 Changing std_logic_vector types to my custom far more convinients xfloat32\! jguarin2002 4605d 11h /sqrt32.vhd
153 last modifications for tb_compiler.py compliance jguarin2002 4612d 03h /sqrt32.vhd
152 Test bench oriented modifications jguarin2002 4616d 04h /sqrt32.vhd
151 Previous Work to generate test benching jguarin2002 4675d 00h /sqrt32.vhd
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4688d 21h /sqrt32.vhd
139 Sync jguarin2002 4799d 13h /sqrt32.vhd
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4810d 04h /sqrt32.vhd
121 taking out std_logic_arith from sight.... no conversions allowed jguarin2002 4855d 16h /sqrt32.vhd
118 fp beta version reached a 17,5% logic cell starting at 450 LEs and finishing in 371 LEs for fadd32 jguarin2002 4862d 03h /sqrt32.vhd
104 Square Root and inversion support jguarin2002 4893d 01h /sqrt32.vhd
103 Square Root Ok jguarin2002 4893d 08h /sqrt32.vhd
99 Square Root... comin sun.... jguarin2002 4894d 22h /sqrt32.vhd

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