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[/] [raytrac/] [branches/] [fp_sgdma/] [raytrac_hw.tcl] - Rev 215

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196 raytrac+sg_dma+raytrac. Step One, the DPC is transformed. Now there are five instructions (check the design document), theres no full queue sync event, there are only four result queues and only 3 add fp 32 b adders rather than 4. Even it seems like a reduction has taken place, decodification efforts take place when decoding multiplexation from arithmetic blocks towards the resulting queues jguarin2002 4517d 06h /raytrac/branches/fp_sgdma/raytrac_hw.tcl
187 Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq jguarin2002 4542d 15h /raytrac_hw.tcl
179 light change on code readbility for Datapath Control hardware description hdl file jguarin2002 4544d 14h /raytrac_hw.tcl
178 QSYS SOPC Raytrac component.... jguarin2002 4568d 05h /raytrac_hw.tcl

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