| Rev |
Log message |
Author |
Age |
Path |
| 60 |
Shifter circuit for Division Phase one done |
jguarin2002 |
4815d 10h |
/raytrac/trunk/arithpack.vhd |
| 59 |
Tarde con pintiti, paquete aritmetico se anade raiz shifter y sqrt |
jguarin2002 |
4818d 16h |
/raytrac/trunk/arithpack.vhd |
| 52 |
Working...... |
jguarin2002 |
4865d 03h |
/raytrac/trunk/arithpack.vhd |
| 50 |
There's now a descent testbench\!\!\! |
jguarin2002 |
4873d 08h |
/raytrac/trunk/arithpack.vhd |
| 49 |
Test bench ifs finally running |
jguarin2002 |
4874d 03h |
/raytrac/trunk/arithpack.vhd |
| 47 |
Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation |
jguarin2002 |
4877d 12h |
/raytrac/trunk/arithpack.vhd |
| 45 |
Magic is already written... now we shall set the testbench on fire\! |
jguarin2002 |
4879d 02h |
/raytrac/trunk/arithpack.vhd |
| 44 |
All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... |
jguarin2002 |
4880d 03h |
/raytrac/trunk/arithpack.vhd |
| 43 |
Nothing to say, just working on the Test Bench... |
jguarin2002 |
4880d 11h |
/raytrac/trunk/arithpack.vhd |
| 42 |
no comment no tb yet: |
jguarin2002 |
4881d 04h |
/raytrac/trunk/arithpack.vhd |
| 40 |
test bench changes..... |
jguarin2002 |
4883d 16h |
/raytrac/trunk/arithpack.vhd |
| 32 |
carry_logic parameter added to uf entity |
jguarin2002 |
4893d 18h |
/raytrac/trunk/arithpack.vhd |
| 27 |
Optimized code, using IEEE libraries and extra parameters to make a more legible code |
jguarin2002 |
4908d 01h |
/raytrac/trunk/arithpack.vhd |
| 26 |
Corrections on opcoder |
jguarin2002 |
4908d 05h |
/raytrac/trunk/arithpack.vhd |
| 25 |
Support to variable width and the possibility to choose between behavioral description and structural description |
jguarin2002 |
4908d 05h |
/raytrac/trunk/arithpack.vhd |
| 24 |
Added a more simple mux to opcoder implementation. |
jguarin2002 |
4914d 22h |
/raytrac/trunk/arithpack.vhd |
| 23 |
Doxygen documentation related changes..... |
jguarin2002 |
4914d 22h |
/raytrac/trunk/arithpack.vhd |
| 22 |
Doxygen Documentation related changes. |
jguarin2002 |
4915d 13h |
/raytrac/trunk/arithpack.vhd |
| 16 |
Commiting differences related to Doxygen documentation adding |
jguarin2002 |
4920d 03h |
/raytrac/trunk/arithpack.vhd |
| 15 |
When selecting s0name, s1name, for a signal that belongs to a 2 stage pipe, the compiler would, based on the name, create just a single flipflop with Q feedbacking D, and that's no the case, so a lot of names has been changed, from s0signalname, s1signalname to stage0signalname, s1signalname and so on... |
jguarin2002 |
4922d 15h |
/raytrac/trunk/arithpack.vhd |
