URL https://opencores.org/ocsvn/rise/rise/trunk

Subversion Repositories rise

[/] [rise/] [trunk/] [vhdl/] [tb_rlu_unit.vhd] - Rev 150

Rev	Log message	Author	Age	Path
148	New directory structure.	root	5719d 03h	/rise/trunk/vhdl/tb_rlu_unit.vhd
71	Added RISE_PACK_SPECIFIC containing either - constants declarations for synthesis or - enumeration types for simulation	jlechner	6505d 08h	/rise/trunk/vhdl/tb_rlu_unit.vhd
42	Modified input signals for register locking (testbench modifications): Since id-stage and write-back-stage may have to lock or unlock two registers in one cycle there are now seperate locking and unlocking adress inputs (two ports for locking/ two for unlocking).	jlechner	6506d 12h	/rise/trunk/vhdl/tb_rlu_unit.vhd
8	Implementation of execute stage and register lock unit. Some changes im RISE package.	jlechner	6518d 17h	/rise/trunk/vhdl/tb_rlu_unit.vhd