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[/] [s6soc/] [trunk/] [rtl/] [Makefile] - Rev 51

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51 Latest RTL changes, adding 20 cycles/instruction to CPU dgisselq 2801d 07h /s6soc/trunk/rtl/Makefile
46 Added missing files from the 8b branch, deleted unneeded files dgisselq 2820d 08h /s6soc/trunk/rtl/Makefile
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.
dgisselq 3139d 21h /s6soc/trunk/rtl/Makefile

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