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[/] [s6soc/] [trunk/] [rtl/] [busmaster.v] - Rev 16

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Rev	Log message	Author	Age	Path
16	Bug fix. This release fixes several bugs associated with transitioning from user mode to supervisor mode while running from flash memory. This also rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an indicator of interrupts and whether or not the CPU has stalled or not as well.	dgisselq	3147d 13h	/s6soc/trunk/rtl/busmaster.v
13	Fixed a nasty parameter problem between toplevel and txuart. The UART transmitter now both works (again), and properly generates the required interrupts. This also finishes the fixes to the alternate toplevel file, alttop.v, that should've been fixed in the last release.	dgisselq	3153d 07h	/s6soc/trunk/rtl/busmaster.v
12	The UART and PWM audio now work. This includes the changes to make that happen, as well as the source code for some UART and PWM demo programs.	dgisselq	3154d 04h	/s6soc/trunk/rtl/busmaster.v
11	Runs on hardware now! Added proper pinouts, pipelined wishbone command interface sufficient for loading the flash, a loader to load the flash, and verified that they work.	dgisselq	3155d 02h	/s6soc/trunk/rtl/busmaster.v
8	First pseudo-running version. The alternate configuration (not the main one) has been initially tested. wbregs works for reading/writing registers, so it is now possible to test the peripherals.	dgisselq	3160d 03h	/s6soc/trunk/rtl/busmaster.v
7	Created/added an initial specification. Updated/corrected several copywrite notices.	dgisselq	3160d 18h	/s6soc/trunk/rtl/busmaster.v
4	Lots of updates, as part of actually making this work on hardware. Not there yet, so this is still pre-alpha.	dgisselq	3181d 13h	/s6soc/trunk/rtl/busmaster.v
2	The initial check in--all the files that will make this SoC work.	dgisselq	3192d 08h	/s6soc/trunk/rtl/busmaster.v

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