URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

[/] [s6soc/] [trunk/] [sw/] [host/] [Makefile] - Rev 22

Rev	Log message	Author	Age	Path
19	Addition of dumpuart.cpp to dump the UART transactions to a FILE (method of debugging the board). FLASHDRVR and ZIPLOAD were also updated to handle loading ELF files where the code is longer than a single block.	dgisselq	3123d 21h	/s6soc/trunk/sw/host/Makefile
12	The UART and PWM audio now work. This includes the changes to make that happen, as well as the source code for some UART and PWM demo programs.	dgisselq	3130d 13h	/s6soc/trunk/sw/host/Makefile
11	Runs on hardware now! Added proper pinouts, pipelined wishbone command interface sufficient for loading the flash, a loader to load the flash, and verified that they work.	dgisselq	3131d 10h	/s6soc/trunk/sw/host/Makefile
8	First pseudo-running version. The alternate configuration (not the main one) has been initially tested. wbregs works for reading/writing registers, so it is now possible to test the peripherals.	dgisselq	3136d 11h	/s6soc/trunk/sw/host/Makefile