URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_bank_ctl.v] - Rev 46

Rev	Log message	Author	Age	Path
37	SDRAM dq and sdram pad clock are termindated inside the top rtl files	dinesha	4685d 06h	/sdr_ctrl/trunk/rtl/core/sdrc_bank_ctl.v
15	Port cleanup	dinesha	4694d 22h	/sdr_ctrl/trunk/rtl/core/sdrc_bank_ctl.v
4	Sdram controller RTL bug fixes done for 16bit SDR Mode	dinesha	4699d 20h	/sdr_ctrl/trunk/rtl/core/sdrc_bank_ctl.v
3	SDRAM controller core files are checked in	dinesha	4706d 06h	/sdr_ctrl/trunk/rtl/core/sdrc_bank_ctl.v