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[/] [sdr_ctrl/] [trunk/] [verif/] [run/] [run_modelsim] - Rev 58

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Rev Log message Author Age Path
43 Test bench automation to handle differ write/read burst sequence is supported now dinesha 4706d 10h /sdr_ctrl/trunk/verif/run/run_modelsim
29 SDRAM top and core related run file list are added into svn dinesha 4711d 04h /sdr_ctrl/trunk/verif/run/run_modelsim
5 Run files are updated into SVN dinesha 4722d 05h /sdr_ctrl/trunk/verif/run/run_modelsim

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