URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [tb/] [tb_core.sv] - Rev 36

Rev	Log message	Author	Age	Path
30	test bench file for integrated SDRAM controller with wish bone and Standalone SDRAM controller test bench are added into SVN	dinesha	4684d 11h	/sdr_ctrl/trunk/verif/tb/tb_core.sv