OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [tb/] [tb_top.sv] - Rev 25

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 tb.sv is renamed as tb_top dinesha 4685d 05h /sdr_ctrl/trunk/verif/tb/tb_top.sv
24 Clean Up dinesha 4685d 05h /sdr_ctrl/trunk/verif/tb/tb.sv
22 Pad sdram clock added dinesha 4686d 10h /sdr_ctrl/trunk/verif/tb/tb.sv
18 8 Bit SDRAM Support is added dinesha 4688d 05h /sdr_ctrl/trunk/verif/tb/tb.sv
14 Unnecessary device config are removed dinesha 4691d 06h /sdr_ctrl/trunk/verif/tb/tb.sv
12 Column Bits are made programmable dinesha 4691d 06h /sdr_ctrl/trunk/verif/tb/tb.sv
8 test bench files are added into SVN dinesha 4695d 07h /sdr_ctrl/trunk/verif/tb/tb.sv

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.