URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Makefile] - Rev 48

Rev	Log message	Author	Age	Path
46	removed hard coded component names from design files define file is always defines.v top level is always top.v	jt_eaton	5090d 01h	/socgen/trunk/Makefile
28	added T6502 processor added vga_char_ctrl	jt_eaton	5156d 00h	/socgen/trunk/Makefile
20	added Nexys2 support expanded docs created tools directory	jt_eaton	5188d 12h	/socgen/trunk/Makefile
19	added serial_xmit module updated and added docs	jt_eaton	5195d 18h	/socgen/trunk/Makefile
16	added geda scripts and symbols/sch	jt_eaton	5202d 18h	/socgen/trunk/Makefile
10	added impact_bat to generate svf files	jt_eaton	5232d 22h	/socgen/trunk/Makefile
6	added pic_micro from minirisc project with design to run code on a digilent Basys board	jt_eaton	5241d 19h	/socgen/trunk/Makefile