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[/] [socgen/] [trunk/] [tools/] [simulation/] [run_sims] - Rev 134

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Rev Log message Author Age Path
133 Added Desing databases and foundation for elaborations tools jt_eaton 3498d 05h /socgen/trunk/tools/simulation/run_sims
131 Added elaboration databases and tools
Added bus map creation tools
jt_eaton 3530d 02h /socgen/trunk/tools/simulation/run_sims
130 Dec 2014 major release
trimmed out some IP
replaced perl database with Berkeley
jt_eaton 3633d 19h /socgen/trunk/tools/simulation/run_sims
128 major cleanup
added toolflows for sim,syn,documentation,linting and verilog
added documentation tools
jt_eaton 4089d 01h /socgen/trunk/tools/simulation/run_sims
126 added mor1kx
cleanup
jt_eaton 4257d 02h /socgen/trunk/tools/simulation/run_sims
124 beta release candidate 1
changed design.xml name
aligned schema with filesystem
jt_eaton 4354d 23h /socgen/trunk/tools/simulation/run_sims
120 clean up componentGenerators names and directories
sim + lint now synthesis TestBench
jt_eaton 4416d 01h /socgen/trunk/tools/simulation/run_sims
119 moved copyright files into /verilog
changed cde copyright to apache from gplv3
split out tools into separate subdirectories
changed design.xml files to socgen: namespace
jt_eaton 4450d 19h /socgen/trunk/tools/simulation/run_sims

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