URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [tools/] [sys/] [workspace] - Rev 103

Rev	Log message	Author	Age	Path
100	created workspace prroject=fpga_mrisc for single compile general cleanup	jt_eaton	4748d 04h	/socgen/trunk/tools/sys/workspace
99	moved all projects into /projects/opencores.org added build_register added fizzim	jt_eaton	4790d 20h	/socgen/trunk/tools/sys/workspace
97	changed sim run directory to icarus added ise directory into syn added _tb testbench file to all sims	jt_eaton	4827d 01h	/socgen/trunk/tools/sys/workspace
96	hierConnections now create ports	jt_eaton	4900d 22h	/socgen/trunk/tools/sys/workspace
95	added first cut at busdefs added clock reset enable pads and jtag_rpc	jt_eaton	4909d 19h	/socgen/trunk/tools/sys/workspace
94	socgen now supports both sim and syn views now allow each xml file to set its destination	jt_eaton	4936d 21h	/socgen/trunk/tools/sys/workspace