URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [tags/] [asyst_2/] [rtl/] [verilog/] [spi_shift.v] - Rev 29

Rev	Log message	Author	Age	Path
27	New directory structure.	root	5622d 08h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
22	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		7694d 02h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
21	Byte selects changed.	simons	7694d 02h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
19	Errors fixed.	simons	7695d 07h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
15	Defines set in order.	simons	7698d 07h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
13	8-bit WB access enabled.	simons	7699d 00h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
9	Support for 128 bits character length added. Zero value divider bug fixed.	simons	7778d 01h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
7	Support for 64 bit caharacter len added.	simons	7886d 14h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v
2	Initial import	simons	8085d 02h	/spi/tags/asyst_2/rtl/verilog/spi_shift.v