URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [tags/] [asyst_3/] [rtl/] [verilog/] [spi_shift.v] - Rev 27

Rev	Log message	Author	Age	Path
27	New directory structure.	root	5622d 05h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
23	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		7693d 23h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
21	Byte selects changed.	simons	7693d 23h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
19	Errors fixed.	simons	7695d 03h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
15	Defines set in order.	simons	7698d 04h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
13	8-bit WB access enabled.	simons	7698d 21h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
9	Support for 128 bits character length added. Zero value divider bug fixed.	simons	7777d 22h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
7	Support for 64 bit caharacter len added.	simons	7886d 11h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v
2	Initial import	simons	8084d 23h	/spi/tags/asyst_3/rtl/verilog/spi_shift.v