OpenCores
URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [trunk/] [bench/] [verilog/] [tb_spi_top.v] - Rev 29

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
27 New directory structure. root 5755d 16h /spi/trunk/bench/verilog/tb_spi_top.v
25 CTRL register bit fields changed, VATS testing support added. simons 7576d 07h /spi/trunk/bench/verilog/tb_spi_top.v
12 Error fixed. simons 7852d 15h /spi/trunk/bench/verilog/tb_spi_top.v
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7911d 08h /spi/trunk/bench/verilog/tb_spi_top.v
8 Automatic slave select signal generation added. simons 7931d 09h /spi/trunk/bench/verilog/tb_spi_top.v
7 Support for 64 bit caharacter len added. simons 8019d 21h /spi/trunk/bench/verilog/tb_spi_top.v
2 Initial import simons 8218d 09h /spi/trunk/bench/verilog/tb_spi_top.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.