URL https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk

Subversion Repositories spi_master_slave

[/] [spi_master_slave/] [trunk/] [syn/] [fuse.xmsgs] - Rev 21

Rev	Log message	Author	Age	Path
20	- removed folder trunk/bench. - added ISE13.1 complete project, with synthesis, map, place & route and timing reports. This project generates bitgen file to program a Digilent Atlys board to verify the cores in FPGA hardware, and include a simulation testbench to simulate the cores.	jdoin	4881d 15h	/spi_master_slave/trunk/syn/fuse.xmsgs