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[/] [srdydrdy_lib/] [trunk/] [rtl/] [verilog/] [buffers/] [sd_fifo_b.v] - Rev 14

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Rev Log message Author Age Path
13 Fixed FIFO Full condition for large fifo, added separate
tests to example bridge
ghutchis 5432d 03h /srdydrdy_lib/trunk/rtl/verilog/buffers/sd_fifo_b.v
6 Modified "B" output buffer for full-rate operation ghutchis 5440d 06h /srdydrdy_lib/trunk/rtl/verilog/buffers/sd_fifo_b.v

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