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[/] [srdydrdy_lib/] [trunk/] [rtl/] [verilog/] [forks/] [sd_mirror.v] - Rev 22

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Rev Log message Author Age Path
14 - Modified large FIFO to remove "full" signal and store only N-1 words
- changed small FIFO to use memory instance instead of registers
- changed sequence generator to enable more complex tests
- changed sd_mirror to use combinatorial assign output
ghutchis 5429d 13h /srdydrdy_lib/trunk/rtl/verilog/forks/sd_mirror.v
2 Initial commit of directory structure and basic components ghutchis 5447d 22h /srdydrdy_lib/trunk/rtl/verilog/forks/sd_mirror.v

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