URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_2_beta/] [sw/] [i8039emu/] [i8039.c] - Rev 316

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5638d 16h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
252	This commit was manufactured by cvs2svn to create tag 'rel_0_2_beta'.		6609d 00h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
88	allow memory bank switching during interrupts	arniml	7412d 08h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
74	enhance pass/fail detection	arniml	7419d 14h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
58	add periodic interrupt	arniml	7428d 03h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7429d 05h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c
49	Imported sources	arniml	7434d 06h	/t48/tags/rel_0_2_beta/sw/i8039emu/i8039.c