URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_4_beta/] [rtl/] [vhdl/] [alu.vhd] - Rev 312

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5667d 16h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
254	This commit was manufactured by cvs2svn to create tag 'rel_0_4_beta'.		6638d 01h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
77	move from std_logic_arith to numeric_std	arniml	7448d 02h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
45	remove unused signals	arniml	7465d 04h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
44	default assignment for aux_carry_o	arniml	7465d 05h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
43	fix sensitivity list	arniml	7466d 06h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
40	rework adder and force resource sharing between ADD, INC and DEC	arniml	7466d 08h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
38	add measures to implement XCHD	arniml	7468d 12h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
26	support for DA instruction	arniml	7475d 05h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd
4	initial check-in	arniml	7480d 05h	/t48/tags/rel_0_4_beta/rtl/vhdl/alu.vhd