URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_5_beta/] [rtl/] [vhdl/] [alu.vhd] - Rev 329

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5607d 19h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
255	This commit was manufactured by cvs2svn to create tag 'rel_0_5_beta'.		6578d 04h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
77	move from std_logic_arith to numeric_std	arniml	7388d 05h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
45	remove unused signals	arniml	7405d 07h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
44	default assignment for aux_carry_o	arniml	7405d 08h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
43	fix sensitivity list	arniml	7406d 09h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
40	rework adder and force resource sharing between ADD, INC and DEC	arniml	7406d 11h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
38	add measures to implement XCHD	arniml	7408d 15h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
26	support for DA instruction	arniml	7415d 08h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd
4	initial check-in	arniml	7420d 08h	/t48/tags/rel_0_5_beta/rtl/vhdl/alu.vhd