URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] [bench/] [vhdl/] [if_timing.vhd] - Rev 306

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5629d 22h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
256	This commit was manufactured by cvs2svn to create tag 'rel_0_6_1_beta'.		6600d 07h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
200	add check for tCP: Port Control Setup to PROG'	arniml	6854d 11h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
160	add others to case statement	arniml	7187d 12h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7226d 12h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
133	add checks for PSEN	arniml	7270d 07h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
82	check expander timings	arniml	7409d 11h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd
81	initial check-in	arniml	7409d 15h	/t48/tags/rel_0_6_1_beta/bench/vhdl/if_timing.vhd