URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] [rtl/] [vhdl/] [system/] [wb_master.vhd] - Rev 292

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5607d 23h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
256	This commit was manufactured by cvs2svn to create tag 'rel_0_6_1_beta'.		6578d 07h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
180	introduce prefix 't48_' for wb_master entity and configuration	arniml	6975d 22h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
172	save data from wishbone bus in register bank with wb_ack necessary to hold data from peripheral/memory until it is read by T48	arniml	7007d 10h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
167	simplify address range: - configuration range - Wishbone range	arniml	7009d 22h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
166	assign default for state_s	arniml	7011d 14h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd
164	initial check-in	arniml	7012d 13h	/t48/tags/rel_0_6_1_beta/rtl/vhdl/system/wb_master.vhd