URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [KNOWN_BUGS] - Rev 301

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5563d 08h	/t48/tags/rel_1_0/KNOWN_BUGS
277	This commit was manufactured by cvs2svn to create tag 'rel_1_0'.		6375d 19h	/t48/tags/rel_1_0/KNOWN_BUGS
260	name tag added	arniml	6533d 17h	/t48/tags/rel_1_0/KNOWN_BUGS
250	add bug report "Deassertion of PROG too early"	arniml	6533d 17h	/t48/tags/rel_1_0/KNOWN_BUGS
212	add bug reports "Problem when INT and JMP" "P2 Port value restored after expander access"	arniml	6786d 21h	/t48/tags/rel_1_0/KNOWN_BUGS
189	add bug report "Target address of JMP and CALL to Program Memory Bank 1 corrupted by interrupt"	arniml	6836d 21h	/t48/tags/rel_1_0/KNOWN_BUGS
175	add bug report "MSB of Program Counter changed upon PC increment"	arniml	6933d 23h	/t48/tags/rel_1_0/KNOWN_BUGS
163	add bug Wrong clock applied to T0	arniml	6968d 22h	/t48/tags/rel_1_0/KNOWN_BUGS
146	add bug RD' and WR' not asserted for INS A, BUS and OUTL BUS, A	arniml	7159d 21h	/t48/tags/rel_1_0/KNOWN_BUGS
139	add bug P1 constantly in push-pull mode in t8048	arniml	7161d 09h	/t48/tags/rel_1_0/KNOWN_BUGS
135	add bug PSENn Timing	arniml	7203d 08h	/t48/tags/rel_1_0/KNOWN_BUGS
121	update bug description for Program Memory bank can be switched during interrupt	arniml	7276d 21h	/t48/tags/rel_1_0/KNOWN_BUGS
117	add bug Program Memory bank can be switched during interrupt	arniml	7277d 22h	/t48/tags/rel_1_0/KNOWN_BUGS
109	add new bug for release 0.1 BETA	arniml	7317d 20h	/t48/tags/rel_1_0/KNOWN_BUGS
105	initial check-in describe bugs of release 0.1 BETA	arniml	7320d 06h	/t48/tags/rel_1_0/KNOWN_BUGS