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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu.v] - Rev 170

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169 ADC bugs finally fixed. gabrieloshiro 5691d 02h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
168 RTI fixed! now ALU doesn`t support RTI instruction anymore. gabrieloshiro 5691d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
167 Now SBC is supposed to work. gabrieloshiro 5691d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
166 Commiting again! gabrieloshiro 5691d 04h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
165 SBC and PHP fixed! gabrieloshiro 5691d 04h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
164 ADC with decimal mode bug... is it ok now? gabrieloshiro 5691d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
163 Still having bugs on ADC with decimal flag! Is it correct now? gabrieloshiro 5691d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
162 ADC with decimal mode ON, bug fixed! gabrieloshiro 5691d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
161 Sum and subtract were wrong when D flag was HIGH. gabrieloshiro 5691d 07h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
158 Bug 28 fixed. PHA was not coping the register to alu_a output gabrieloshiro 5694d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
157 gabrieloshiro 5694d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
156 Some bugs were fixed. Testbench were expecting wrong values sometimes. gabrieloshiro 5694d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
154 BRK_IMP was asserting 0 to B flag.

Bug report #25 fixed.		 gabrieloshiro 5694d 10h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
152 Bug #24 from trac was fixed. gabrieloshiro 5695d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
151 tah comitado! gabrieloshiro 5695d 04h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
150 Bug #24 from trac might be fixed. Processor register is working properly. gabrieloshiro 5695d 04h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
149 Bug #24 from trac might be fixed. Processor register is working properly. gabrieloshiro 5695d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
148 Reset assertion was commented. It was not working properly. gabrieloshiro 5695d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
145 ASL instruction fixed. For some reason the operator "<<" is not working properly. gabrieloshiro 5696d 04h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v
142 Alu bug fixed. Z and N flags depend on result, so they must be attributed after result is assigned. gabrieloshiro 5696d 08h /t6507lp/trunk/rtl/verilog/t6507lp_alu.v

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