OpenCores
URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu_tb.v] - Rev 201

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
186 Testbench has a lot of new tests. gabrieloshiro 5583d 02h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
184 TXA and TYA behavior were changed. Now alu_result dont receive A value gabrieloshiro 5583d 11h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
183 STA, STY and STX should be working now gabrieloshiro 5584d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
181 This time ADC decimal should be working properly and SBC (normal mode) should be back to its accurate behavior gabrieloshiro 5584d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
179 STA, STY and STX fixed gabrieloshiro 5584d 09h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
178 STA, STY and STX fixed gabrieloshiro 5584d 09h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
176 RTI works for me gabrieloshiro 5584d 11h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
174 SBC borrow flag bug fixed... again gabrieloshiro 5585d 08h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
173 SBC bug fixed. Borrow should be working properly. gabrieloshiro 5585d 08h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
169 ADC bugs finally fixed. gabrieloshiro 5586d 03h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
165 SBC and PHP fixed! gabrieloshiro 5586d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
164 ADC with decimal mode bug... is it ok now? gabrieloshiro 5586d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
161 Sum and subtract were wrong when D flag was HIGH. gabrieloshiro 5586d 08h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
158 Bug 28 fixed. PHA was not coping the register to alu_a output gabrieloshiro 5589d 05h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
156 Some bugs were fixed. Testbench were expecting wrong values sometimes. gabrieloshiro 5589d 07h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
150 Bug #24 from trac might be fixed. Processor register is working properly. gabrieloshiro 5590d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
149 Bug #24 from trac might be fixed. Processor register is working properly. gabrieloshiro 5590d 07h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
148 Reset assertion was commented. It was not working properly. gabrieloshiro 5590d 07h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
145 ASL instruction fixed. For some reason the operator "<<" is not working properly. gabrieloshiro 5591d 06h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v
143 Modified the inputs so the alu resets. creep 5591d 07h /t6507lp/trunk/rtl/verilog/t6507lp_alu_tb.v

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.