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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [vga_controller.v] - Rev 255

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Rev Log message Author Age Path
233 ADC and SBC are 100% verified in regular mode. Decimal mode still missing. creep 5521d 03h /t6507lp/trunk/rtl/verilog/vga_controller.v
232 New video test. creep 5522d 21h /t6507lp/trunk/rtl/verilog/vga_controller.v
230 Changed TIA behavior. It is now pixel-based. creep 5522d 23h /t6507lp/trunk/rtl/verilog/vga_controller.v
229 Created a one-line pattern. creep 5523d 04h /t6507lp/trunk/rtl/verilog/vga_controller.v
228 gabrieloshiro 5523d 04h /t6507lp/trunk/rtl/verilog/vga_controller.v
227 Fixing conflicts. creep 5523d 04h /t6507lp/trunk/rtl/verilog/vga_controller.v
225 Minor changes! gabrieloshiro 5523d 20h /t6507lp/trunk/rtl/verilog/vga_controller.v
224 Added a top level for the tests. creep 5523d 22h /t6507lp/trunk/rtl/verilog/vga_controller.v
223 Minor sintax errors fixed. gabrieloshiro 5523d 23h /t6507lp/trunk/rtl/verilog/vga_controller.v
222 Added a simple line-by-line tester. creep 5524d 01h /t6507lp/trunk/rtl/verilog/vga_controller.v
221 Added a VGA controller. creep 5524d 04h /t6507lp/trunk/rtl/verilog/vga_controller.v

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