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[/] [test_project/] [trunk/] [bench/] [verilog/] [orpsoc_testbench_defines.v] - Rev 34

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34 Fixed up couple of things. Changed way the test name is defined in sim Makefile julius 5667d 06h /test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
30 Updating bench julius 5671d 03h /test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
26 Adding testbench and makefile update julius 5672d 08h /test_project/trunk/bench/verilog/orpsoc_testbench_defines.v

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