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Subversion Repositories test_project

[/] [test_project/] [trunk/] [bench/] [verilog/] [orpsoc_testbench_defines.v] - Rev 83

Rev	Log message	Author	Age	Path
54	Added verilog UART decoder for event-driven sim tests (icarus, nc) - removed MAC tests from multiplier tests - not returning right results for some reason - should be looked at	julius	5675d 14h	/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
52	Enabled own printf function using UART as output	julius	5676d 04h	/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
34	Fixed up couple of things. Changed way the test name is defined in sim Makefile	julius	5690d 15h	/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
30	Updating bench	julius	5694d 13h	/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
26	Adding testbench and makefile update	julius	5695d 17h	/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v