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[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [debug_if/] [dbg_top.v] - Rev 43

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43 Added some verilator lint controls, made icarus script much more concise. First stage of verilation now works julius 5681d 20h /test_project/trunk/rtl/verilog/components/debug_if/dbg_top.v
18 the rest of the design unneback 5689d 20h /test_project/trunk/rtl/verilog/components/debug_if/dbg_top.v

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