OpenCores
URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sim/] [bin/] [Makefile] - Rev 47

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
47 Basic verilator model getting closer. Included more modules from the example by Jeremy Bennett. Final cplusplus executable from verilator output fails to link properly julius 5878d 09h /test_project/trunk/sim/bin/Makefile
45 Many updates including internal SRAM instead of SDRAM as default, so inclusion of the SRAM model, a new VMEM generation program, and script and testbench updates to allow the switching on and off for SDRAM, which as mentioned is now off by default julius 5880d 06h /test_project/trunk/sim/bin/Makefile
44 Beginnings of verilator build - much still to do but the design can now at least be verilated julius 5886d 09h /test_project/trunk/sim/bin/Makefile
43 Added some verilator lint controls, made icarus script much more concise. First stage of verilation now works julius 5886d 13h /test_project/trunk/sim/bin/Makefile
42 Fixed up to allow compilation with verilator. Mostly separation of modules into appropriate file names. However some vector declaration changes in the smii module has definitely broken it. julius 5887d 05h /test_project/trunk/sim/bin/Makefile
41 Removed duplicate or1200_defines.v and timescale.v files julius 5887d 07h /test_project/trunk/sim/bin/Makefile
39 Removed auto logging of processor state, added option to enable it in makefile, documented way the tests are done in makefile and that should probably be moved to some readme at some point julius 5887d 09h /test_project/trunk/sim/bin/Makefile
36 Couple of makefile updates julius 5888d 11h /test_project/trunk/sim/bin/Makefile
35 Fixed or1200_defines confusion julius 5888d 11h /test_project/trunk/sim/bin/Makefile
34 Fixed up couple of things. Changed way the test name is defined in sim Makefile julius 5888d 12h /test_project/trunk/sim/bin/Makefile
33 Fixed up software linker script, and changed placement of vectors where necessary. Icarus tests up to mul-nocache-O2 works but had to re-enable MAC in or1200 julius 5890d 00h /test_project/trunk/sim/bin/Makefile
32 Looks like basic icarus tests passing. Todo is a list of timeouts for the rtl sim julius 5890d 03h /test_project/trunk/sim/bin/Makefile
31 Further progress with orpsoc test setup julius 5890d 04h /test_project/trunk/sim/bin/Makefile
26 Adding testbench and makefile update julius 5893d 13h /test_project/trunk/sim/bin/Makefile
22 compiles with icarus. basic make script done julius 5893d 15h /test_project/trunk/sim/bin/Makefile

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.