URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sim/] [bin/] [icarus.scr] - Rev 50

Rev	Log message	Author	Age	Path
45	Many updates including internal SRAM instead of SDRAM as default, so inclusion of the SRAM model, a new VMEM generation program, and script and testbench updates to allow the switching on and off for SDRAM, which as mentioned is now off by default	julius	5678d 17h	/test_project/trunk/sim/bin/icarus.scr
44	Beginnings of verilator build - much still to do but the design can now at least be verilated	julius	5684d 21h	/test_project/trunk/sim/bin/icarus.scr
43	Added some verilator lint controls, made icarus script much more concise. First stage of verilation now works	julius	5685d 01h	/test_project/trunk/sim/bin/icarus.scr
42	Fixed up to allow compilation with verilator. Mostly separation of modules into appropriate file names. However some vector declaration changes in the smii module has definitely broken it.	julius	5685d 16h	/test_project/trunk/sim/bin/icarus.scr
41	Removed duplicate or1200_defines.v and timescale.v files	julius	5685d 19h	/test_project/trunk/sim/bin/icarus.scr
35	Fixed or1200_defines confusion	julius	5686d 23h	/test_project/trunk/sim/bin/icarus.scr
34	Fixed up couple of things. Changed way the test name is defined in sim Makefile	julius	5686d 23h	/test_project/trunk/sim/bin/icarus.scr
31	Further progress with orpsoc test setup	julius	5688d 16h	/test_project/trunk/sim/bin/icarus.scr
22	compiles with icarus. basic make script done	julius	5692d 02h	/test_project/trunk/sim/bin/icarus.scr