URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sw/] [dhry/] [Makefile] - Rev 54

Rev	Log message	Author	Age	Path
52	Enabled own printf function using UART as output	julius	5652d 11h	/test_project/trunk/sw/dhry/Makefile
45	Many updates including internal SRAM instead of SDRAM as default, so inclusion of the SRAM model, a new VMEM generation program, and script and testbench updates to allow the switching on and off for SDRAM, which as mentioned is now off by default	julius	5658d 16h	/test_project/trunk/sw/dhry/Makefile
25	Adding sw dir PROPERLY	julius	5672d 02h	/test_project/trunk/sw/dhry/Makefile