URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sw/] [support/] [Makefile.inc] - Rev 54

Rev	Log message	Author	Age	Path
54	Added verilog UART decoder for event-driven sim tests (icarus, nc) - removed MAC tests from multiplier tests - not returning right results for some reason - should be looked at	julius	5669d 01h	/test_project/trunk/sw/support/Makefile.inc
52	Enabled own printf function using UART as output	julius	5669d 15h	/test_project/trunk/sw/support/Makefile.inc
45	Many updates including internal SRAM instead of SDRAM as default, so inclusion of the SRAM model, a new VMEM generation program, and script and testbench updates to allow the switching on and off for SDRAM, which as mentioned is now off by default	julius	5675d 20h	/test_project/trunk/sw/support/Makefile.inc
33	Fixed up software linker script, and changed placement of vectors where necessary. Icarus tests up to mul-nocache-O2 works but had to re-enable MAC in or1200	julius	5685d 15h	/test_project/trunk/sw/support/Makefile.inc
25	Adding sw dir PROPERLY	julius	5689d 05h	/test_project/trunk/sw/support/Makefile.inc