OpenCores
URL https://opencores.org/ocsvn/tinycpu/tinycpu/trunk

Subversion Repositories tinycpu

[/] [tinycpu/] [trunk/] [docs/] [design.md.txt] - Rev 31

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
30 After a long weekend of thinking how to do this.. I've decided instead to not strive for a single-cycle computer.
Now, instead, ALU operations will be 2 cycle along with memory operations, and data movement operations are still 1 cycle
earlz 4554d 02h /tinycpu/trunk/docs/design.md.txt
29 Well, added a testcase for testing the ALU bitwise operations and found a very large problem.
I'm pretty sure that the decoder needs to be partially unclocked because it essentially makes the ALU clocked how it is now, which is very bad.
earlz 4557d 09h /tinycpu/trunk/docs/design.md.txt
27 Added a few ALU opcodes and came across a weird propogation delay issue with my registerfile.
As a workaround, I'm trying to use falling_edge instead of rising_edge. We shall see if I regret this later
earlz 4558d 09h /tinycpu/trunk/docs/design.md.txt
25 Wait for memory state now works as expected, and opcode `mov [reg], immd` works now earlz 4558d 14h /tinycpu/trunk/docs/design.md.txt
21 The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it. earlz 4560d 00h /tinycpu/trunk/docs/design.md.txt
19 Got beginning of core/decoder for the CPU earlz 4561d 02h /tinycpu/trunk/docs/design.md.txt
17 Added fetch component for fetching from memory to instruction register
Added additional testing for carryover to make sure it's correct
earlz 4565d 01h /tinycpu/trunk/docs/design.md.txt
16 Renamed incdec to carryover (see design for why).
carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding.
earlz 4568d 03h /tinycpu/trunk/docs/design.md.txt
14 Added ALU with all the operations we'll need. Synthesizes as well trivially earlz 4570d 09h /tinycpu/trunk/docs/design.md.txt
5 Modified registerfile to be dual-port for both read and write earlz 4576d 02h /tinycpu/trunk/docs/design.md.txt
4 Added internal memory interface
Updated design
earlz 4576d 10h /tinycpu/trunk/docs/design.md.txt
3 Updated registerfile to have 2 read ports
Added super rough design document mainly just for brainstorming
earlz 4577d 02h /tinycpu/trunk/docs/design.md.txt

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.