OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [env/] [tb_top.v] - Rev 100

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
89 RTL and environment fixes for nmi bug ghutchis 5501d 19h /tv80/trunk/env/tb_top.v
84 New directory structure. root 5742d 05h /tv80/trunk/env/tb_top.v
69 Added UART instance in testbench, and added UART to compile list. ghutchis 7202d 16h /tv80/trunk/env/tb_top.v
66 Modified top level testbench to reflect changes in simple_gmii block ghutchis 7210d 17h /tv80/trunk/env/tb_top.v
56 Updated env for simple_gmii with async clk ghutchis 7285d 14h /tv80/trunk/env/tb_top.v
53 Added environment hooks for using and testing the GMII interface ghutchis 7287d 14h /tv80/trunk/env/tb_top.v
42 Added decode of OUT (##),A instruction
Removed dump-by-default and added DUMP_START define
ghutchis 7325d 09h /tv80/trunk/env/tb_top.v
36 Removed default instruction decode ghutchis 7329d 06h /tv80/trunk/env/tb_top.v
31 1) Added environment support for Z80 op decode in log file.
2) Fixed env support for interrupt generation and clearing
ghutchis 7345d 17h /tv80/trunk/env/tb_top.v
28 Added code to initialize RAM to all 00 at environment start-up time. ghutchis 7348d 17h /tv80/trunk/env/tb_top.v
2 Initial commit ghutchis 7500d 21h /tv80/trunk/env/tb_top.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.