URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [scripts/] [reglib.py] - Rev 112

Rev	Log message	Author	Age	Path
110	Updated rgen script, added documentation for rgen	ghutchis	4841d 01h	/tv80/trunk/scripts/reglib.py
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5314d 23h	/tv80/trunk/scripts/reglib.py
84	New directory structure.	root	5575d 12h	/tv80/trunk/scripts/reglib.py
67	Updated register generator based on testing with simple_gmii. Changed how interrupt output mux is created, fixed many bugs.	ghutchis	7043d 23h	/tv80/trunk/scripts/reglib.py
64	Created rgen script and expanded available register types	ghutchis	7044d 22h	/tv80/trunk/scripts/reglib.py
59	Added lib for generating MPU interfaces	ghutchis	7079d 03h	/tv80/trunk/scripts/reglib.py