URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [scripts/] [reglib.py] - Rev 92

Rev	Log message	Author	Age	Path
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5478d 06h	/tv80/trunk/scripts/reglib.py
84	New directory structure.	root	5738d 19h	/tv80/trunk/scripts/reglib.py
67	Updated register generator based on testing with simple_gmii. Changed how interrupt output mux is created, fixed many bugs.	ghutchis	7207d 06h	/tv80/trunk/scripts/reglib.py
64	Created rgen script and expanded available register types	ghutchis	7208d 05h	/tv80/trunk/scripts/reglib.py
59	Added lib for generating MPU interfaces	ghutchis	7242d 10h	/tv80/trunk/scripts/reglib.py